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5 ? max ron, 4- and 8-channel 15 v/12 v/5 v i cmos? multiplexers preliminary technical data ADG1408/adg1409 rev. prb information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2004 analog devices, inc. all rights reserved. features 5 ? max on resistance 0.5 ? max on resistance flatness 33 v supply maximum ratings fully specified at 15 v/12 v/5 v 3 v logic compatible inputs rail-to-rail operation break-before-make switching action 16-lead tssop and 4 mm 4 mm lfcsp packages typical power consumption (< 0.03 w) applications relay replacement audio and video routing automatic test equipment data acquisition systems battery-powered systems sample-and-hold systems communication systems relay replacement functional block diagrams s1 a0 d a1 a2 ADG1408 s1a a0 da s4a s1b s4b db en adg1409 1 of 4 decoder en 1 of 8 decoder a1 s8 switches shown for a ?1? logic input figure 1. general description the ADG1408 and adg1409 are monolithic i cmos analog multiplexers comprising eight single channels and four differential channels, respectively. the ADG1408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines a0, a1, and a2. the adg1409 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines a0 and a1. an en input on both devices is used to enable or disable the device. when disabled, all channels are switched off. the i cmos (industrial-cmos) modular manufacturing process combines high-voltage cmos (complementary metal- oxide semiconductor) and bipolar technologies. it enables the development of a wide range of high performance analog ics capable of 30-v operation in a footprint that no other generation of high-voltage parts has been able to achieve. unlike analog ics using conventional cmos processes, i cmos components can tolerate high supply voltages, while providing increased performance, dramatically lower power consumption, and reduced package size. the ultralow on resistance and on resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications, where low distortion is critical. i cmos construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery powered instruments product highlights 1. 5 ? max on resistance. 2. 0.5 ? max on resistance flatness. 3. 3 v logic compatible digital input v ih = 2.0 v, v il = 0.8 v. 4. 16-lead tssop and 4 mm 4 mm lfcsp package.
ADG1408/adg1409 preliminary technical data rev. prb | page 2 of 16 table of contents specifications..................................................................................... 3 dual supply ................................................................................... 3 single supply ................................................................................. 4 dual supply ................................................................................... 5 absolute maximum ratings............................................................ 7 esd caution.................................................................................. 7 pin configurations?tssop ...........................................................8 terminology .......................................................................................9 typical performance characteristics........................................... 10 test circuits..................................................................................... 12 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history
preliminary technical data ADG1408/adg1409 rev. prb | page 3 of 16 specifications dual supply 1 v dd = +15 v 10%, v ss = ?15 v 10%, gnd = 0 v, unless otherwise noted. table 1. parameter +25oc ? 40oc to +85oc ? 40oc to +125oc unit test conditions/comments analog switch analog signal range v ss to v dd v r on 3 typ v d = 10 v, i s = ?10 ma 4 5 5 max r on flatness typ v d = +10 v, ?10 v 0.5 max r on 0.5 typ v d = +10 v, ?10 v max leakage currents source off leakage i s (off) 0.01 na typ v d = 10 v, v s = ?10 v; test circuit 2 0.5 2.5 50 na max 0.5 drain off leakage i d (off) v d = 10 v; v s = 10 v; ADG1408 1 100 100 na max test circuit 3 adg1409 1 50 50 na max channel on leakage i d, i s (on) v s = v d = 10 v; ADG1408 1 100 100 na max test circuit 4 adg1409 1 50 50 na max digital inputs input high voltage, v inh 2.0 2.0 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 a max v in = v inl or v inh 0.5 0.5 a max c in , digital input capacitance 5 pf typ dynamic characteristics 2 t transition 80 120 120 ns typ r l = 300 , c l = 35 pf; 250 250 ns max v s1 = 10 v, v s8 = 10 v; test circuit 5 t bbm 10 10 10 ns typ r l = 300 , c l = 35 pf; 1 ns min v s = 10 v; test circuit 6 t on (en) 85 125 125 ns typ r l = 300 c l = 35 pf; 150 225 225 ns max v s = 5 v; test circuit 7 t off (en) 40 65 65 ns typ r l = 300 , c l = 35 pf; 150 150 ns max v s = 5 v; test circuit 7 charge injection 20 20 pc typ v s = 0 v, r s = 0 , c l = 10 nf; test circuit 8 off isolation 75 db typ r l = 1 k, f = 100 khz; v en = 0 v; test circuit 9 channel-to-channel crosstalk 85 db typ rl = 1 k, f = 100 khz; test circuit 10 total harmonic distortion, thd + n 0.002 % typ r l = 600 , 5 v rms; f=20 hz to 20 khz ? 3 db bandwidth 50 mhz typ r l = 300 , c l = 5 pf; test circuit 10 test circuit 10 c s (off) 15 pf typ f = 1 mhz
ADG1408/adg1409 preliminary technical data rev. prb | page 4 of 16 parameter +25oc ? 40oc to +85oc ? 40oc to +125oc unit test conditions/comments dynamic characteristics 2 c d (off) f = 1 mhz ADG1408 100 pf typ adg1409 50 pf typ c d , c s (on) f = 1 mhz ADG1408 150 pf typ adg1409 75 pf typ power requirements v dd = +16.5 v, v ss = ? 16.5 v i dd 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i dd 150 a typ digital inputs= 5 v 300 a max i ss 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i gnd 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i gnd 150 a typ digital inputs= 5 v 5 300 a max 1 temperature ranges are as follows: b version: ? ?
preliminary technical data ADG1408/adg1409 rev. prb | page 5 of 16 parameter +25oc ?40oc to +85oc ?40oc to +125oc unit test conditions/comments dynamic characteristics 2 t off (en) 60 ns typ r l = 300 , c l = 35 pf; v s = 5 v; test circuit 7 charge injection 5 pc typ v s = 0 v, r s = 0 , c l = 10 nf; test circuit 8 off isolation ?75 db typ r l = 1 k f = 100 khz; v en = 0 v; test circuit 9 channel-to-channel crosstalk 85 db typ r l = 1 k, f = 100 khz; test circuit 10 total harmonic distortion, thd + n 0.002 % typ r l = 600 , 5 v rms; f=20 hz to 20 khz ? 3 db bandwidth 50 mhz typ r l = 300 , c l = 5 pf; test circuit 10 c s (off) 15 pf typ f = 1 mhz c d (off) f = 1 mhz ADG1408 100 pf typ adg1409 50 pf typ c d , c s (on) f = 1 mhz ADG1408 150 pf typ adg1409 75 pf typ power requirements v dd = 13.2 v i dd 1 1 a typ digital inputs= 0 v or v dd 5 5 a max i dd 150 a typ digital inputs= 5 300 a max 1 temperature ranges are as foll ows: b version: ?40c to +85 ; t version: ?55c to +125. 2 guaranteed by design, not subject to production test. dual supply 1 v dd = 5 v 10%, v ss = ?5 v 10%, gnd = 0 v, unless otherwise noted. table 3. parameter +25oc ?40oc to +85oc ?40oc to +125oc unit test conditions/comments analog switch analog signal range v ss to v dd v r on 6 typ v d = 3.3 v, i s = ? 10 ma 7 8 10 max r on 0.5 max v d = +3.3 v, ? 3.3 v leakage currents source off leakage i s (off) 0.01 na typ v d = 3.3 v, v s = ? 3.3 v; test circuit 2 0.5 2.5 50 na max drain off leakage i d (off) v d = 3.3. v; v s = 3.3 v; ADG1408 1 100 100 na max test circuit 3 adg1409 1 50 50 na max channel on leakage i d, i s (on) v s = v d = 3.3 v; ADG1408 1 100 100 na max test circuit 4 adg1409 1 50 50 na max
ADG1408/adg1409 preliminary technical data rev. prb | page 6 of 16 parameter +25oc ?40oc to +85oc ?40oc to +125oc unit test conditions/comments digital inputs input high voltage, v inh 2.0 2.0 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 a max v in = v inl or v inh 0.5 0.5 a max c in , digital input capacitance 5 pf typ dynamic characteristics 2 t transition 120 120 ns typ r l = 300 , c l = 35 pf; 250 250 ns max v s1 = 10 v, v s8 = 10 v; test circuit 5 t bbm ns typ r l = 300 , c l = 35 pf; 1 ns min v s = 5 v; test circuit 6 t on (en) 85 125 125 ns typ r l = 300 c l = 35 pf; 150 225 225 ns max v s = 5 v; test circuit 7 t off (en) 65 65 ns typ r l = 300 , c l = 35 pf; 150 150 ns max v s = 5 v; test circuit 7 charge injection 20 pc typ v s = 0 v, r s = 0 , c l = 10 nf; test circuit 8 off isolation ? 75 ? 75 db typ r l = 1 k, f = 100 khz; v en = 0 v; test circuit 9 channel-to-channel crosstalk 85 85 db typ rl = 1 k, f = 100 khz; test circuit 10 total harmonic distortion, thd + n 0.002 % typ r l = 600 , 5 v rms; f = 20 hz to 20 khz -3db bandwidth 50 mhz typ r l = 300 , c l = 5 pf; test circuit 10 test circuit 10 c s (off) 15 pf typ f = 1 mhz c d (off) f = 1 mhz ADG1408 100 pf typ adg1409 50 pf typ c d , c s (on) f = 1 mhz ADG1408 150 pf typ adg1409 75 pf typ power requirements v dd = +16.5v, v ss = ? 16.5v i dd 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i dd 150 a typ digital inputs= 5 v 300 a max i ss 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i gnd 0.001 a typ digital inputs= 0 v or v dd 5 5 a max i gnd 150 a typ digital inputs= 5 v 5 300 a max 1 temperature ranges are as follows: b version: ? ?
preliminary technical data ADG1408/adg1409 rev. prb | page 7 of 16 absolute maximum ratings absolute maximum ratings t a = 25c, unless otherwise noted. table 4. parameter rating v dd to v ss 36 v v dd to gnd ?0.3 v to +25 v v ss to gnd +0.3 v to ?25 v analog, digital inputs 1 v ss ? 0.3 v to v dd + 0.3 v or 20 ma, whichever occurs first continuous current, s or d 30 ma peak current, s or d (pulsed at 1 ms, 10% duty cycle max) 100 ma operating temperature range industrial (b versio n) ?40 c to +85c automotive (y version) ?40 c to +125c storage temperature range ?65 c to +150c junction temperature 150c tssop package, power dissipation 450 mw ja , thermal impedance 150.4c/w jc , thermal impedance 50c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c 1 overvoltages at a, en, s, or d are cl amped by internal diodes. current should be limited to the ma ximum ratings given stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ADG1408/adg1409 preliminary technical data rev. prb | page 8 of 16 pin configurations

table 5. ADG1408 truth table a2 a1 a0 en on switch x x x 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 figure 2. pin configurations?tssop a 0 en s3 d top view (not to scale) ADG1408 a1 a2 s5 s6 s7 gnd s8 11 9 8 7 6 5 4 3 2 1 12 13 14 15 16 10 vss s4 s1 s2 vdd s2a s3a s4a s1a da gnd s1b db s2b s4b s3b a0 en top view (not to scale) adg1409 a1 1 1 9 8 7 6 5 4 3 2 1 12 13 14 15 16 10 vss vdd table 6. adg1409 truth table al a0 en on switch pair x x 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 figure 3. pin configurat ions ? 4mm x4mm lfcsp
preliminary technical data ADG1408/adg1409 rev. prb | page 9 of 16 terminology table 7. mnemonic description v dd most positive power supply potential. v ss most negative power supply potential in dual supplies. in single supply applications, it may be connected to ground. gnd ground (0 v) reference. r on ohmic resistance between d and s. r on difference between the r on of any two channels. i s (off) source leakage current when the switch is off. i d (off) drain leakage current when the switch is off. i d , i s (on) channel leakage current when the switch is on. v d ( vs ) analog voltage on terminals d, s. c s (off) channel input capacitance for off condition. c d (off) channel output capaci tance for off condition. c d , c s (on) on switch capacitance. ci n digital input capacitance. t on (en) delay time between the 50% and 90% points of the digital input and switch on condition. t off (en) delay time between the 50% and 90% points of the digital input and switch off condition. t transition delay time between the 50% and 90% points of the digital inputs and the switch on cond ition when switching from one address state to another. t open off time measured between the 80% point of both switc hes when switching from one address state to another. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. i dd positive supply current. i ss negative supply current. off isolation a measure of unwanted sign al coupling through an off channel. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. bandwidth the frequency at which th e output is attenuated by 3dbs. on response the frequency response of the ?on? switch. thd + n the ratio of the harmonic amplitude pl us noise of the signal to the fundamental.
ADG1408/adg1409 preliminary technical data rev. prb | page 10 of 16 typical performance characteristics tbd figure 4. on resistance as a function of vd(vs) for single supply tbd figure 5. on resistance as a function of vd(vs) for dual supply tbd figure 6. on resistance as a function of vd(vs) for different temperatures, single supply tbd figure 7. on resistance as a function of vd(vs) for different temperatures, single supply tbd figure 8. on resistance as a function of vd(vs) for different temperatures, dual supply tbd figure 9. leakage currents as a function of v d (v s )
preliminary technical data ADG1408/adg1409 rev. prb | page 11 of 16 tbd figure 10. leakage currents as a function of temperature tbd figure 11. supply currents vs. input switching frequency tbd figure 12. charge injection vs. source voltage tbd figure 13. ton/toff times vs. temperature) tbd figure 14. off isolation vs. frequency tbd figure 15. crosstalk vs. frequency tbd figure 16. on response vs. frequency tbd figure 17. thd + n vs. frequency
ADG1408/adg1409 preliminary technical data rev. prb | page 12 of 16 test circuits figure 18. test circuit 1. on resistance figure 19. test circuit 2. i s (off) figure 20. test circuit 3. i d (off) figure 21. test circuit 4. i d (on) figure 22. test circuit 5. switching time of multiplexer, t transltlon figure 23. test circuit 6. break-before-make delay, t open
preliminary technical data ADG1408/adg1409 rev. prb | page 13 of 16 figure 24. test circuit 7. enable delay, t on (en), t off (en) figure 25. test circuit 8. charge injection figure 26. test circuit 9. off isolation figure 27. test circuit 10. channel-to-channel crosstalk
ADG1408/adg1409 preliminary technical data rev. prb | page 14 of 16 outline dimensions figure 28. 16-lead thin shrink sm all outline package [tssop] (ru-16) figure 29. 16-lead lead frame chip scale package [lfcsp] 4mm 4 mm (cp-16) dimensions shown in inches and (millimeters) ordering guide model temperature range description package option ADG1408yru ? ? ? ?
preliminary technical data ADG1408/adg1409 rev. prb | page 15 of 16 notes
ADG1408/adg1409 preliminary technical data rev. prb | page 16 of 16 notes ? 2004 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. pr04861?0?11/04(prb)

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